Researching and designing the digital up and down converter for software defined radio (SDR) systems with efficient resources based on FPGA technology

Abstract

This paper presents the architecture and implementation of the digital up and down converter based on a FPGA chip with efficient resources which is well suited for the evolving technology of software defined radio systems. The divice may be
widely adopted in the applications of digital signal processing and digital communication systems. Demonstration of transceiver system design is implemented by using the QPSK modulation technique. And this design is done by the System Generator for DSP 14.7.