A 110 dB SNR, 512 OSR, third order delta-sigma modulator for 24-bit ADC in 130 nm CMOS process

Authors

  • Quang Tay Ho*, Thi Thu Nga Ngo, Duy Doan

Keywords:

delta-sigma modulator, OSR of 24-bit ADC, SNR of 24-bit ADC, third order delta-sigma modulator, 24-bit ADC

Abstract

In this paper, a design with simulation results of the 3rd order delta-sigma modulator will be presented. The post-layout simulations show that the modulator achieves SNR of 110 dB, OSR of 512 and more than 18 effective bits ENOBat with 8 KHz input frequency. This modulator is a significant part of the 24-bit Analog-to-digital converter (ADC) chip. Furthermore, this deltasigma modulator is successfully integrated into a complete 4 mW power consumption 24-bit resolution ADC chip in 130 nm TSMC technology.

 

Classification number

1.2

Author Biography

Quang Tay Ho*, Thi Thu Nga Ngo, Duy Doan

Trung tâm Nghiên cứu và Đào tạo thiết kế vi mạch

Downloads

Published

2016-02-25

Received: 10 July 2015; accepted: 31 August 2015

How to Cite

Ho Quang Tay* , Ngo Thi Thu Nga, Doan Duy. (2016). A 110 dB SNR, 512 OSR, third order delta-sigma modulator for 24-bit ADC in 130 nm CMOS process. Version B of Vietnam Journal of Science and Technology, 58(2). Retrieved from https://b.vjst.vn/index.php/ban_b/article/view/189

Issue

Vol. 58 No. 2 (2016): Volume 58 - Number 2 - February 2016

Section

Natural Sciences